Are Si/SiGe tunneling field-effect transistors a good idea?
Steven J. Koester, Isaac Lauer, et al.
ECS Transactions
The role of epi in CMOS as one of the key performance enhancing element for both bulk-Si and SOI technologies is well established. This review discusses e-SiGe, e-Si, and raised source drain epi research for 15 nm and beyond nodes. Impact of proposed device design change from "doped body" to "undoped body" will be examined. Finally, growth options for strained SiGe (> 50%) on Si without a graded buffer layer have been studied to fabricate short channel pFETs. Challenges and opportunities for epi in the context of future generation CMOS are discussed. ©The Electrochemical Society.
Steven J. Koester, Isaac Lauer, et al.
ECS Transactions
Leonardo Massai, Bence Hetényi, et al.
Communications Materials
Kangguo Cheng, A. Khakifirooz, et al.
VLSI Circuits 2011
Dechao Guo, G. Karve, et al.
VLSI Technology 2016