Conference paper
Dual workfunction fully silicided metal gates
C. Cabral Jr., J. Kedzierski, et al.
VLSI Technology 2004
Annealing behavior of Cu and dilute Cu-alloy films was analyzed. Annealing at 400 °C for 5 h or 650 or 950 °C for 0 h led to a reduction in resistivity as a result of grain growth and alloy decomposition by precipitation and/or surface segregation. The higher the annealing temperature, the lower the resistivity.
C. Cabral Jr., J. Kedzierski, et al.
VLSI Technology 2004
K.L. Saenger, C. Cabral Jr., et al.
Journal of Materials Research
K. Barmak, A. Gungor, et al.
Materials Science in Semiconductor Processing
C. Cabral Jr., L. Clevenger, et al.
Applied Physics Letters