Conference paper
A 1 mv MOS comparator
Y.S. Yee, L.G. Heller, et al.
ESSCIRC 1977
Paper
An Investigation of the Potential of MOS Transistor Memories
Abstract
The design and performance characteristics of a 128X64 MOS transistor memory is given. The storage cell used operates with a low standby power, 0.1 mW. The memory operates with a 12-ns access time, 35-ns read cycle time, and a 60-ns write cycle time. Copyright © 1966 by The Institute of Electrical and Electronics Engineers, Inc.
Related
Conference paper
Limits - some are more fundamental than others
L.M. Terman
ICSICT 1995
L.M. Terman, L.G. Heller
IEEE T-ED
Conference paper
Competing high-speed/high-density technologies
L.M. Terman
ISSCC 1978