Emanuele Uccelli, Nicolas Daix, et al.
ITNG 2014
We report on the first demonstration of ultra-thin body (50 nm), low defectivity 200 mm InGaAs-on-insulator (-OI) fabricated by direct wafer bonding technique (DWB) as well as a replacement gate process for self-aligned fully depleted InGaAs MOSFETs. These combined achievements highlight the viability of our approach for the VLSI integration of InGaAs at advanced nodes. Short channel replacement gate (RMG) and Gate-first (GF) FETs are reported for the first time using InGaAs-OI wafers with a 120nm contact-to-contact pitch. Record ION (118 μA/μm) at fixed operating voltage of 0.5V for InGaAs devices on Si is achieved on 50-nm-Lg RMG FinFETs. Both schemes feature highly scaled fins (down to 15 nm). Compared to a GF integration flow, RMG devices exhibit better Ion and DIBL characteristics. We also demonstrate FETs with 70 nm contacts and 120 nm pitch achieving high-ION.
Emanuele Uccelli, Nicolas Daix, et al.
ITNG 2014
Isaac Lauer, Nicolas Loubet, et al.
VLSI Technology 2015
V. Djara, Marilyne Sousa, et al.
Microelectronic Engineering
Veeresh Deshpande, Herwig Hahn, et al.
VLSI Technology 2017