PaperA 1.0-ns 5-kbit ecl RAMChing-Te Chuang, Denny D. Tang, et al.IEEE Journal of Solid-State Circuits
Conference paperAnalysis and modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETsKeunwoo Kim, Ching-Te Chuang, et al.VLSI-TSA 2003
PaperOptimal design of triple-gate devices for high-performance and low-power applicationsMeng-Hsueh Chiang, Jeng-Nan Lin, et al.IEEE Transactions on Electron Devices
Conference paperA New Dynamic Beta-Ratio Circuit Technique for Strained-Si TechnologyRajiv V. Joshi, Keunwoo Kim, et al.IEEE International SOI Conference 2003
