Publication
VLSI Circuits 2006
Conference paper

A 5-mW 6-Gb/s quarter-rate sampling receiver with a 2-tap DFE using soft decisions

Abstract

A low-power quarter-rate sampling 2-tap DFE is realized for short I/O links. An analog sampling and soft-decision technique is used instead of look-ahead architectures to relax the critical path, and thus saving the power from the redundant paths. No errors are observed with 231-1 PRBS at 6Gb/s, with 80-mV differential launch amplitude through a channel with 6.2-dB attenuation at 3GHz. The receiver draws 4.8mA from a 1.0-V supply. © 2006 IEEE.

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Publication

VLSI Circuits 2006

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