A 34&181;m²DRAM cell fabricated with a 1&181;m single-level polycide FET technology

Abstract

Exploratory one-device dynamic RAM arrays, fabricated with an N-channel single-level polycide, 22.5nm gate oxide technology, using electron-beam direct writing for lithography with a minimum feature size of 1μm1 will be described. A single- Level polycide structure rather than an overlapping double-poly- Silicon cell was chosen because it uses a simpler and more reliable process. In this paper it will be demonstrated that with a non- conventional cell layout , low resistance polycidc wordlincs, and appropriate device and circuit design, the density and performance of this dynamic RAM are comparable to that of the overlapping double-polysilico cell.