I. Morgenstern, K.A. Müller, et al.
Physica B: Physics of Condensed Matter
A 23.8-GHz tuned amplifier is demonstrated in a partially scaled 0.1-μm silicon-on-insulator CMOS technology. The fully integrated three-stage amplifier employs a common-gate, source-follower, and cascode with on-chip spiral inductors and MOS capacitors. The gain is 7.3 dB, while input and output reflection coefficients are -45 and -9.4 dB, respectively. Positive gain is exhibited beyond 26 GHz. The amplifier draws 53 mA from a 1.5-V supply. The measured on-wafer noise figure is 10 dB, while the input-referred third-order intercept point is -7.8 dBm. The results demonstrate that 0.1-μm CMOS technology may be used for 20-GHz RF applications and suggest even higher operating frequencies and better performance for further scaled technologies.
I. Morgenstern, K.A. Müller, et al.
Physica B: Physics of Condensed Matter
O.F. Schirmer, K.W. Blazey, et al.
Physical Review B
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
Douglass S. Kalika, David W. Giles, et al.
Journal of Rheology