A Scalable Multi-TeraOPS Core for AI Training and InferenceSunil ShuklaBruce Fleischeret al.2018IEEE SSC-L
A Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and InferenceBruce FleischerSunil Shuklaet al.2018VLSI Circuits 2018
DyHard-DNN: Even more DNN acceleration with dynamic hardware reconfigurationMateja PuticAlper Buyuktosunogluet al.2018DAC 2018
Compensated-DNN: Energy efficient low-precision deep neural networks by compensating quantization errorsShubham JainSwagath Venkataramaniet al.2018DAC 2018
Exploiting approximate computing for deep learning accelerationChia-Yu ChenJungwook Choiet al.2018DATE 2018
POSTER: Design Space Exploration for Performance Optimization of Deep Neural Networks on Shared Memory AcceleratorsSwagath VenkataramaniJungwook Choiet al.2017PACT 2017
Scaledeep: A scalable compute architecture for learning and evaluating deep networksSwagath VenkataramaniAshish Ranjanet al.2017ISCA 2017
INVITED: Accelerator Design for Deep Learning Training: Extended Abstract: InvitedAnkur AgrawalChia-Yu Chenet al.2017DAC 2017
17 Feb 2020US10565285Processor And Memory Transparent Convolutional Lowering And Auto Zero Padding For Deep Neural Network Implementations
KEKaoutar El MaghraouiPrincipal Research Scientist and Manager, AIU Spyre Model Enablement, AI Hardware Center