Early wirability checking and 2D congestion-driven circuit placement
- R.S. Tsay
- S.C. Chang
- et al.
- 1992
- Annual ASIC Conference and Exhibit 1992
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2 results at Annual ASIC Conference and Exhibit 1992
Robin Hood: A system timing verifier for multi-phase level-sensitive clock designs
- R.S. Tsay
- I. Lin
- 1992
- Annual ASIC Conference and Exhibit 1992