A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS
- Hayun Chung
- Alexander Rylyakov
- et al.
- 2009
- VLSI Circuits 2009
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25 results for Zeynep Toprak-Deniz
A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS
- Hayun Chung
- Zeynep Toprak-Deniz
- et al.
- 2015
- Analog Integr Circuits Signal Process
IBM POWER8 circuit design and energy optimization
- Victor Zyuban
- Joshua Friedrich
- et al.
- 2015
- IBM J. Res. Dev
Dual-loop system of distributed microregulators with high DC accuracy, load response time below 500 ps, and 85-mV dropout voltage
- John F. Bulzacchelli
- Zeynep Toprak-Deniz
- et al.
- 2012
- IEEE Journal of Solid-State Circuits
On-line global energy optimization in multi-core systems using principles of analog computation
- Zeynep Toprak Deniz
- Yusuf Leblebici
- et al.
- 2007
- IEEE Journal of Solid-State Circuits