Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- IEDM 2009
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6 results for J.L. Herman
Extremely thin SOI (ETSOI) technology: Past, present, and future
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2010
- IEEE International SOI Conference 2010
Challenges and opportunities of extremely thin SOI (ETSOI) CMOS technology for future low power and general purpose system-on-chip applications
- A. Khakifirooz
- Kangguo Cheng
- et al.
- 2010
- VLSI-TSA 2010
Fully depleted extremely thin SOI technology fabricated by a novel integration scheme featuring implant-free, zero-silicon-loss, and faceted raised source/drain
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- VLSI Technology 2009
RTA-driven intra-die variations in stage delay, and parametric sensitivities for 65nm technology
- I. Ahsan
- N. Zamdmer
- et al.
- 2006
- VLSI Technology 2006
High performance 0.13 μm SOI CMOS technology with Cu interconnects and low-k BEOL dielectric
- P. Smeys
- V. McGahay
- et al.
- 2000
- VLSI Technology 2000