A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- ISSCC 2024
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6 results for P. Jacob
Thermal modeling of 3-D stacked DRAM over SiGe HBT BiCMOS CPU
- Ryan Clarke
- P. Jacob
- et al.
- 2015
- IEEE Access
Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- IEEE Journal of Solid-State Circuits
Active memory cube: A processing-in-memory architecture for exascale systems
- Ravi Nair
- Samuel F. Antao
- et al.
- 2015
- IBM J. Res. Dev
Carry chains for ultra high-speed SiGe HBT adders
- Alexey Gutin
- Philip Jacob
- et al.
- 2011
- IEEE TCAS-I
Mitigating memory wall effects in high-clock-rate and multicore CMOS 3-D processor memory stacks
- Philip Jacob
- Aamir Zia
- et al.
- 2009
- Proceedings of the IEEE