Reducing Address Arithmetic Overheads: New Compiler Techniques for Programmable Dataflow-based AI AcceleratorsPrasanth ChatarasiNicole Khounet al.2026PACT 2026Conference paper
Eliminating Redundancy: Ultra-compact Code Generation for Programmable Dataflow AcceleratorsPrasanth ChatarasiAlex Gateaet al.2026CGO 2026Conference paper
Enabling Spill-Free Compilation via Affine-Based Live Range Reduction OptimizationPrasanth ChatarasiAlex Gateaet al.2026CGO 2026Conference paper