POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth
- Eric J. Fluhr
- Joshua Friedrich
- et al.
- 2014
- ISSCC 2014
Publications
89 results for Ruchir Puri
Circuit and physical design of the zenterprise™ ec12 microprocessor chips and multi-chip module
- James Warnock
- Yuen Chan
- et al.
- 2014
- IEEE Journal of Solid-State Circuits
LatchPlanner: Latch placement algorithm for datapath-oriented high-performance VLSI designs
- Minsik Cho
- Hua Xiang
- et al.
- 2013
- ICCAD 2013
Depth controlled symmetric function fanin tree restructure
- Hua Xiang
- Lakshmi Reddy
- et al.
- 2013
- ICCAD 2013
Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures
- Subhendu Roy
- Mihir Choudhury
- et al.
- 2013
- DAC 2013
5.5GHz system z microprocessor and multi-chip module
- James Warnock
- Yuen H Chan
- et al.
- 2013
- ISSCC 2013
Network flow based datapath bit slicing
- Hua Xiang
- Minsik Cho
- et al.
- 2013
- ISPD 2013
Intuitive ECO synthesis for high performance circuits
- Haoxing Ren
- Ruchir Puri
- et al.
- 2013
- DATE 2013
Design methodology for the IBM POWER7 microprocessor
- Joshua Friedrich
- Ruchir Puri
- et al.
- 2011
- IBM J. Res. Dev
Novel binary linear programming for high performance clock mesh synthesis
- Minsik Cho
- David Z. Pan
- et al.
- 2010
- ICCAD 2010