Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
- D. Singh
- J. Sleight
- et al.
- 2005
- IEDM 2005
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4 results for B. Tessier
Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing
- H.S. Yang
- R. Malik
- et al.
- 2004
- IEDM 2004
Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
- H. Nayfeh
- D. Singh
- et al.
- 2006
- IEEE Electron Device Letters
Effect of contact liner stress in high-performance FDSOI devices with ultra-thin silicon channels and 30 nm gate lengths
- D. Singh
- J. Hergenrother
- et al.
- 2005
- IEEE International SOI Conference 2005