About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
Journal of Applied Physics
Paper
WSi0.11 Schottky gates for GaAs metal semiconductor field-effect transistors
Abstract
Schottky gates for self-aligned GaAs metal semiconductor field-effect transistors (MESFETs) have been formed by dc magnetron sputtering of WSi 0.11 onto sputter-cleaned GaAs surfaces. The WSi0.11/GaAs diodes showed good current-voltage and capacitance-voltage characteristics after annealing at 800 °C. Schottky barrier heights measured by current-voltage were φI-VB ≅0.73 eV with an ideality factor n≅1.14 for large diodes and φI-VB ≅0.67 eV with n≅1.3 for 1×10 μm gates without a self-aligned n+ implant. The n+ self-aligned implant was found to cause leakage current, which was interpreted as a parallel small-area, low-barrier diode at the gate edge. FETs formed with this gate material showed good threshold voltage uniformity with a standard deviation as low as 31 mV for 1 μm enhancement-mode FETs and 49 mV for 1 μm depletion-mode FETs on a 51-mm wafer.