TSV density impact on 3D power delivery with high aspect ratio TSVs

Abstract

This paper reports on modeling of the power delivery in TSV-based 3D systems, i.e., vertically integrated ICs with uniformly-distributed high-aspect-ratio through-silicon vias (TSVs). The voltage drop and di/dt noise are modeled to evaluate the impact of TSV density and TSV aspect ratio (AR). The frequency dependency of TSV parasitics is modeled with full-wave EM simulator, and the performance of the power delivery network (PDN) is analyzed in the frequency domain. PDNs with low-AR and high-AR TSVs are compared for trade-off analysis in terms of power delivery performance and TSV area occupation, which is critical for the design of TSV-based 3D power delivery. © 2013 IEEE.