Transmission line pulse picosecond imaging circuit analysis methodology for evaluation of ESD and latch up

Abstract

This paper will demonstrate the synthesis of the high current pulse source method (e.g. used in transmission line pulse (TLP) systems) and the Picosecond Imaging Circuit Analysis (PICA) tool for the evaluation of electrostatic discharge (ESD) and latchup phenomenon. In this fashion, the evolution of ESD and latchup can be evaluated in semiconductor devices, and in peripheral circuits at a wafer level or product level. The methodology described in this publication allows for visualization of ESD and latchup events (e.g. animation in a picosecond time regime). The synthesis of the transmission line pulse (TLP) method and the PICA method allows for the extension of the ESD TLP methodology to terminal currents and spatial and time domain analysis for electrical characterization and reliability analysis, and the high current pulsed source extends the utilization of the PICA methodology for failure analysis on wafer and chip levels.