ECTC 2008
Conference paper

The viability of 25 Gb/s on-board signalling

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What package improvements are required for dense, high aggregate bandwidth buses running at data rates beyond 10 Gb/s per pin, and when might optical interconnects on the board be required? We present a study of distance and speed limits for electrical on-board module-to-module links with an eye to answering these questions. Detailed electrical link models have been validated with active, high-speed differential bus measurements utilizing a 16-channel link chip with programmable equalization and a per-channel data rate of up to 11 Gb/s. Electrical signalling limits were then determined by extrapolating our models to higher speeds, and these limits were compared to the results of work on on-board optical interconnects. © 2008 IEEE.