Presilicon modeling is a crucial and integral part of processor microarchitecture definition and optimization. In this article, I attempt to provide a retrospective view of IBM's POWER and PowerPC microprocessors, through the lens of someone who has been associated with such modeling in support of microarchitecture definition and optimization from the earliest days of this particular family of processors. The focus in the early/mid-1980s was on cycle-accurate performance modeling; much later, beginning in 1999 or so, the looming power wall triggered a new era of power-performance modeling at the microarchitecture level. Subsequently, temperature-aware and reliability-aware modeling were added dimensions that CMOS technology evolution drove us into. The problem of model validation is an unavoidable aspect of presilicon modeling. Without that mindset, the microarchitecture definition team can make serious mistakes, which results in unpleasant postsilicon surprises. I provide pointers to early approaches in addressing this issue. The article attempts to mention the contributions of many talented researchers and engineers that have, over the years, contributed immensely to the evolution of the POWER/PowerPC microprocessors from earliest research concepts through the recently announced POWER10-using model-based analysis to ensure competitive performance growth.