Pong-Fei Lu, G.P. Li, et al.
IEEE Electron Device Letters
This paper describes the first realization of a reduced-field design concept for advanced bipolar devices using the low-temperature epitaxial (LTE) technique to form the base layer. By inserting a lightly doped collector (LDC) spacer layer between the heavily doped base and collector regions, we have successfully demonstrated that the collector-base (CB) junction avalanche multiplication can be reduced substantially while maintaining high collector doping for current density consideration. Similar applications of the LDS technique to the emitter-base (EB) junction also result in a lower electric field, thus less EB junction reverse leakage. © 1990 IEEE
Pong-Fei Lu, G.P. Li, et al.
IEEE Electron Device Letters
Denny D. Tang, Catherine Wong, et al.
IEEE Electron Device Letters
Gary L. Patton, James H. Comfort, et al.
IEEE Electron Device Letters
G.P. Li, Tze-Chiang Chen, et al.
IEEE Electron Device Letters