Abstract
The IBM JBIG-ABIC Verification Suite is a newly designed verification suite that contains more than 5000 correctly encoded test images. Previously existing verification images in total and consolidated in an ad hoc suite tested only a small fraction of the algorithm and were inadequate. The IBM JBIG-ABIC Verification Suite provides compatibility testing reference data for the ITU-T/ISO JBIG sequential mode and IBM ABIC image compression standards. In this paper, the test images are described and related to the JBIG and ABIC compression standards and options. The verification suite was used to debug and verify the algorithms in the IBM JBIG-ABIC core that is integrated into the Xionics XipChip imaging microcontrollers.