IEDM 1988
Conference paper

Sub-50 ps single poly planar bipolar technology


The authors present a single-poly bipolar technology using an advanced transistor with an LDD (lightly doped drain)-like self-aligned lateral profile. The device is isolated by a silicon-filled deep trench with a collector-to-collector breakdown voltage of 33 V, and the field oxide is provided by a low-temperature beakless process. The integrated process yields a structure with minimal topography, thereby avoiding several serious concerns associated with the conventional double-poly structures. Using this technology, sub-50-ps ECL (emitter coupled logic) circuits have been realized, demonstrating for the first time the potential of the single-poly device.