Publication
ISSCC 1978
Conference paper

Sub-100ps experimental Josephson interferometer logic

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Abstract

This paper will cover experimental Josephson interferometer logic gates fabricated in a 5 μm technology with 1 μW/gate dissipation, citing measured delays of 40, 95 and 120ps for OR, AND and master slave latch, respectively.

Date

15 Feb 1978

Publication

ISSCC 1978

Authors

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