Kaoutar El Maghraoui, Gokul Kandiraju, et al.
WOSP/SIPEW 2010
A general theory for characterizing and then realizing algorithms in hardware is given. The physical process of computation is interpreted in terms of a graph in physical space and time, and then an embedding into this graph of another graph which characterizes data flow in particular algorithms is given. The types of the special class of computational structures called systolic arrays which can occur physically are completely described, and a technique is developed for mapping the graph of a particular systolic algorithm into a physical array. Examples illustrate the methodology. © 1984 Springer-Verlag.
Kaoutar El Maghraoui, Gokul Kandiraju, et al.
WOSP/SIPEW 2010
Michael D. Moffitt
ICCAD 2009
Gal Badishi, Idit Keidar, et al.
IEEE TDSC
Zohar Feldman, Avishai Mandelbaum
WSC 2010