Soft-error resilience of the IBM POWER6 processor input/output subsystem

Abstract

The soft-error resilience of the IBM POWER6™ processor I/O (input/ output) subsystem was measured using proton beam irradiation to accelerate the effect of single-event upsets. Test programs exercised each of the adapters on the chip. Error rates were measured for various cases ranging from idle to high I/O bandwidth and utilization. The POWER6 processor and I/O hub subsystem work together to maintain resiliency even under strenuous irradiation conditions. © Copyright 2008 by International Business Machines Corporation.