Despite its inherent speed advantage over CMOS technologies under loaded conditions, the silicon bipolar transistor historically has been dismissed as a viable candidate for digital applications in the 77 K environment. The principal reason for this is the well documented degradation in the device current gain at low temperatures. It is demonstrated in this paper that this conclusion is no longer valid with respect to state-of-the-art devices. The transistors used in this investigation have sufficient current gain at 77 K for most digital applications without intentional profile modification. Emitter coupled logic (ECL) circuits switch at < 100 ps speeds at 77 K, and reduced logic-swing operation offers the benefits of an attractive power-delay product. This paper examines the physics, design and performance issues associated with the low temperature operation of silicon bipolar transistors, and discusses the potential advantages of such devices for high speed applications in future low temperature computer systems. © 1990.