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Publication
Journal of Electrostatics
Paper
Shallow trench isolation double-diobe electrostatic discharge circuit and interaction with DRAM output circuitry
Abstract
Electrostatic discharge (ESD) performance of a shallow-trench-isolation double-diode protection circuit in CMOS technology is discussed. This paper highlights the sensitivities of these devices to semiconductor process parameters, interaction with chip circuitry and advanced failure analysis techniques. © 1993.