Scheduling of transactions for system-level test-case generation

We present a methodology for scheduling system-level transactions generated by a test-case generator. A system, in this context, may be composed of multiple processors, busses, bus-bridges, memories, etc. The methodology is based on an exploration of scheduling abilities in a hardware system. In its focus is a language for specifying transactions and their ordering. Through the use of hierarchy, the language provides the possibility of applying high-level scheduling requests. The methodology is realized in X-Gen, a system-level test-case generator used in IBM. The model and algorithm used by this tool are also discussed.