Conference paper
Drift-tolerant multilevel phase-change memory
Nikolaos Papandreou, H. Pozidis, et al.
IMW 2011
A new reduced-complexity decoding algorithm for low-density parity-check codes that operates entirely in the log-likelihood domain is presented. The computationally expensive check-node updates of the sum-product algorithm are simplified by using a difference-metric approach on a two-state trellis and by employing the dual-max approximation. The dual-max approximation is further improved by using a correction factor that allows the performance to approach that of full sum-product decoding.
Nikolaos Papandreou, H. Pozidis, et al.
IMW 2011
H. Pozidis, P. Bächtold, et al.
INEC 2006
D.R. Sahoo, W. Häberle, et al.
ACC 2008
R. Khaddam-Aljameh, M. Stanisavljevic, et al.
VLSI Technology 2021