Gregory Czap, Kyungju Noh, et al.
APS Global Physics Summit 2025
Pre-silieon yield estimators for ASIC products have the potential for improved accuracy based on retrospective critical area and yield analysis of completed designs. A prototype closed-loop system, in which a database of observed yield and computed critical areas is continuously compiled and updated, is described in this paper. The database allows a yield model based on circuit content, which is available at the time of quote, but before the physical layout, to be optimized to more accurately reflect a technology's random defect sensitivities. Confining one's observations to the mature 130-nm technology minimizes the inclusion of systematic defects in the observed yield and allows for a more complete view of the random defect component of yield loss. © 2008 IEEE.
Gregory Czap, Kyungju Noh, et al.
APS Global Physics Summit 2025
Dipanjan Gope, Albert E. Ruehli, et al.
IEEE T-MTT
A.B. McLean, R.H. Williams
Journal of Physics C: Solid State Physics
R.M. Macfarlane, R.L. Cone
Physical Review B - CMMP