Full metal gate with borderless contact for 14 nm and beyond
Soon-Cheon Seo, L.F. Edge, et al.
VLSI Technology 2011
This paper presents a comprehensive overview of the research done in the last decade on planar Fully-Depleted-Silicon-On-Insulator (FDSOI) technologies in the frame of the joint development program between IBM, ST Microelectronics and CEA-LETI. In particular, we review the technological developments ranging from substrate engineering to process modules that enable functionality and improve FDSOI performance over several generations. Various multi Vt integration schemes to maximize the benefits of the thin BOX FDSOI platform are discussed. Manufacturability as well as scalability concerns are highlighted and addressed. In addition, this work provides understanding of the performance/power trade-offs for FDSOI circuits and device variability. Finally, clear directions for future application-specific products are given, demonstrating that FDSOI is an attractive CMOS option for next generation high performance and low-power applications.
Soon-Cheon Seo, L.F. Edge, et al.
VLSI Technology 2011
Q. Liu, Frederic Monsieur, et al.
VLSI Technology 2011
Davood Shahrjerdi, Stephen W. Bedell, et al.
Solid-State Electronics
Kangguo Cheng
ECS Meeting 2017