Conference paper
Non-planar device architecture for 15nm node: FinFET or trigate?
Chung-Hsun Lin, Josephine Chang, et al.
IEEE International SOI Conference 2010
We present a methodology to generate performance-aware corner models (PAMs). Accuracy is improved by emphasizing electrical variation data and reconciling the process and electrical variation data. PAM supports corner (± σ and ±2σ) simulation and Monte Carlo simulation. Furthermore, PAM supports the practice of application-specific corner cards, for example, for gain-sensitive applications. © 2009 IEEE.
Chung-Hsun Lin, Josephine Chang, et al.
IEEE International SOI Conference 2010
Darsen Lu, Josephine Chang, et al.
SISPAD 2013
Chung-Hsun Lin, Wilfried Haensch, et al.
VLSI Technology 2011
Miaomiao Wang, Pranita Kulkarni, et al.
IRPS 2010