As Si-transistor technology advances beyond the 10 nm node, the device research community is increasingly looking into the possibility of replacing Si with novel, high mobility materials as the transistor channel. Among several possible candidate materials, germanium and germanium-tin alloys (GeSn) have emerged as strong contenders for the next generation of complementary metal oxide semiconductor (CMOS) transistors. This article presents a comprehensive overview of the state of the art in Ge and GeSn transistor research. We address several key material challenges involved in fabricating high-performance Ge/GeSn-based CMOS transistors, such as gate stack formation and achieving low-resistance contacts to transistor source/drain regions. Using Ge/GeSn as channel materials, we present a FinFET-based, Si-compatible CMOS solution for device dimensions expected in the 7 nm technology node, discuss the practical challenges involved in realizing this design, and highlight directions for future research.