MRS Spring Meeting 2023

Mitigating Analog Memory Non-Idealities for In-Memory Inference and Learning of DNN

View publication


The rapid improvements in hardware accelerators and the availability of large data sets for training AI models have been pivotal for the progress in Deep Neural Networks (DNNs). GPUs are an excellent match for Deep Learning (DL) workloads due to the high degree of parallelization. Nonetheless, such accelerators must carefully orchestrate the flow of vast amounts of data between on- or off-chip memories and highly-specialized processing units to perform the matrix manipulations at the core of DL. In in-memory analog computing, matrix manipulations are done on arrays of non-volatile memories (NVMs). These operations, that are inherent in the back-propagation algorithm of training models, can be performed at constant time and in parallel on arrays in which the weights are encoded in the NVM elements. Thus, these computations are performed locally avoiding moving weights from memory to the compute unit and back. This, together with the intrinsic high parallelism, created the recent interest for analog computing for DL [1], with the promise to provide further improvement in compute efficiency. Several memristive technologies are under study for the implementation of neuromorphic hardware, and they rely on diverse physical mechanisms and materials. However, improvements in the device characteristics remains a necessity for optimal hardware acceleration in both performance precision and energy consumption. Device requirements are also dictated by algorithmic considerations, highlighting the multi-dimensional nature of analog accelerator designing. Phase Change Memories (PCM) and filamentary-based Oxide Resistive RAM (OxReRAM) are the two most promising NVM candidates in neuromorphic hardware [2,3]. Their conductance change, which is directly mapped into synaptic weights, relies on a phase transition in the material for PCM. Instead, the rupture/formation of oxygen vacancies based conductive paths is responsible for the weight update in filamentary-based OxReRAM. Strength and challenges of the two classes of NVMs will be discussed, as well as the innovative design and material stack concepts that lead to enhanced operational characteristics. A discussion on the ideal class of applications for a more efficient use of PCM- or OxReRAM-based synapses will follow. [1] G. Burr et al., Advances in Physics: X, 2, 1, 89-124 (2017) [2] Abu Sebastian et al., Jour. Of Phys. D, 52, 44 (2019) [3] B. Govoreanu, et al., Proc. IEEE Int. Electron Devices Meeting, 31.6.1–31.6.4 (2011)