Conference paper
Conditional memory ordering
Christoph Von Praun, Harold W. Cain, et al.
ISCA 2006
Value-based replay eliminates the need for content-addressable memories in the load queue, removing one barrier to scalable out-of-order instruction windows. Instead, correct memory ordering is maintained by simply re-executing certain load instructions in program order. A set of novel filtering heuristics reduces the average additional cache bandwidth demanded by value-based replay to less than 3.5 percent.
Christoph Von Praun, Harold W. Cain, et al.
ISCA 2006
Harold W. Cain, Mikko H. Lipasti, et al.
Journal of Instruction-Level Parallelism
Xiaotong Zhuang, Mauricio J. Serrano, et al.
ACM SIGPLAN Notices
Priya Nagpurkar, Harold W. Cain, et al.
PACT 2007