Conference paper
Carbon based graphene nanoelectronics technologies
Chun Yung Sung, Yu-Ming Lin, et al.
VLSI-TSA 2010
A technique is presented to measure the temperature of a large, dense, CMOS clock buffer while it is operating. The technique uses the subthreshold slope of a single pFET, thereby avoiding introducing special technology enhancements for thermal sensing, and uses purely simple electrical measurements. The technique is demonstrated to work in the presence of high-frequency digital switching in a realistic test site fabricated in a 14 nm finFET technology.
Chun Yung Sung, Yu-Ming Lin, et al.
VLSI-TSA 2010
Joachim N. Burghartz, Mehmet Soyuer, et al.
IEEE Journal of Solid-State Circuits
Keith A. Jenkins, Anup P. Jose, et al.
ESSCIRC 2005
Shu-Jen Han, Alberto Valdes-Garcia, et al.
IEDM 2011