Conference paper
A 27 GHz 20 ps PNP technology
J. Warnock, P.F. Lu, et al.
IEDM 1989
The measurement of the accumulated phase error of phase-locked loops (PLLs) in microprocessor systems is discussed. A system which creates controlled power supply noise and measures the PLL response is described. Examples of the use of this technique are shown for a PLL used in a 400MHz microprocessor.
J. Warnock, P.F. Lu, et al.
IEDM 1989
D. Heidel, U. Bapst, et al.
IEEE TNS
Keith A. Jenkins, K. Rim
IEEE Electron Device Letters
J.N. Burghartz, M. Soyuer, et al.
ESSDERC 1995