Negative Bias Temperature Instability (NBTI) remains one of the leading degradation mechanisms in CMOS devices. Long term NBTI recovery at low-power use conditions following a stress at a higher voltage, high-performance mode, is reported. A new phenomenological NBTI model is proposed, incorporating both stress and recovery at the two modes of operation. We show that the recovery rate under bias is linearly proportional to the difference between the stress and biased relaxation voltages. We further reveal that, unlike the zero-bias recovery case, devices under low-voltage bias relaxation are expected to re-degrade at longer times, which may be beyond the typical 10-year lifetime. A method for forecasting the re-degradation time is proposed. Finally, we show that for combinations of AC/DC stress and relaxation, the latter bias conditions dictate the final NBTI shift.