Individual oxide traps as probes into submicron devices

In field-effect transistors with gate areas less than 0.5 μm2 the effect of a single electron trapped in the gate oxide on the device resistance is easily observable. In about 10% of these devices a single thermally activated two-state trap produces most of the low-frequency resistance fluctuations in a wide bandwidth near room temperature. Detailed information about this single oxide interface trap can be extracted from the temperature and bias dependence of the trapping kinetics. In this work we extend this technique to locating the trap between the source and drain. With this information these traps become unique local 5-50 Å probes into submicron devices to study the local surface potential and the sensitivity to localized trapped charges under different bias conditions.