HOT CARRIER EFFECTS IN ADVANCED SELF-ALIGNED BIPOLAR TRANSISTORS.

Abstract

The hot carrier effects in advanced self-aligned sidewall spacer bipolar transistors are described. The experimental results show a direct correlation between extrinsic base drive-in thermal cycles and interface state generation thresholds. The devices with lower temperature, shorter drive-in, cycles have better hot carrier resistance. However, there is a trade-off between hot carrier resistance and intrinsic-extrinsic base overlap. Low values of extrinsic base thermal cycles can result in low values of emitter-collector punch through voltage. For better control of extrinsic and intrinsic link-up and higher hot carrier resistance, a thinner sidewall accompanied by a link-up implant are desired. In this case, the optimized extrinsic base profile's effect on extrinsic-intrinsic base link-up and on hot carrier resistance will be minimized.