E. Burstein
Ferroelectrics
A 1- mu m n-well CMOS technology with high latchup immunity has been designed, realized, and characterized. The main features of this technology are: 1-MeV ion-implanted retrograde n-well buried-contact arsenic-phosphorous double-diffused n** plus /n- junction; self-aligned TiSi//2 on gate and diffusions with nitride spacer; and thin p epi on p** plus substrate. This technology has been demonstrated via the successful fabrication of high-performance 64 K CMOS SRAM chips. It has been observed that the silicide plays an important role in latchup prevention since it reduces the emitter efficiencies of parasitic bipolar devices.
E. Burstein
Ferroelectrics
A.B. McLean, R.H. Williams
Journal of Physics C: Solid State Physics
Biancun Xie, Madhavan Swaminathan, et al.
EMC 2011
Ronald Troutman
Synthetic Metals