Conference paper
Gate work function engineering for nanotube-based circuits
Zhihong Chen, Joerg Appenzeller, et al.
ISSCC 2007
We report on a high-performance back-gated carbon nanotube field-effect transistor (CNFET) with a peak transconductance of 12.5 μS and a delay time per unit length of τ/L = 19 ps/μm. In order to minimize the parasitic capacitances and optimize the performance of scaled CNFETs, we have utilized a dual-gate design and have fabricated a 40-nm-gate CNFET possessing excellent subthreshold and output characteristics without exhibiting short-channel effects. © 2005 IEEE.
Zhihong Chen, Joerg Appenzeller, et al.
ISSCC 2007
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CLEO 2010
Joerg Appenzeller, Yu-Ming Lin, et al.
IEEE TNANO
Guanxiong Liu, Yanqing Wu, et al.
ACS Nano