HF surface passivation failure in integrated thermal oxidation processing

Abstract

Ultraclean, integrated MOS oxide fabrication has been investigated for the first time by combining (i) surface cleaning in inert ambient, (ii) wafer transfer through ultrahigh vacuum, and (iii) thermal oxidation in a UHV-based rector. Device-quality oxide structures are obtained under suitable conditions, while under other circumstances chemical mechanisms severely degrade electrical performance: even in ultraclean environments, impurity-related silicon (Si) etching reactions before oxidation degrade oxide quality, but this can be avoided by appropriate use of passivating oxide films which prevent roughness associated with etching.