Heterojunctions in Integrated Hybrid III-V/Si Photonic Crystal Emitters

Abstract

Integrated photonic circuits (PICs) have the prospect of a more energy-efficient on-chip data transmission but are still lacking scaled active devices. Promising candidates are integrated hybrid III-V/Si photonic crystal emitters, which benefit from template-assisted selective epitaxy for the local self-aligned integration of III-Vs. In this work, we specifically focus on the implementation of different III-V materials and double-heterostructures and demonstrate the benefit of simultaneous optical and electrical confinement in such structures. This opens a new path towards the realization of fully integrated, densely packed and scalable PICs.