FINPAGE: Generating high performance feed-specific parser circuits

Abstract

The low latency and high throughput requirements of high-frequency trading has resulted in increasing adoption of dedicated hardware for processing financial feeds. Development of hardware platforms, however, is plagued with slow design/verification cycles compared to their software counterparts. In this work, we present FINPAGE, a FINancial PArser GEnerator, to automatically generate hardware structures for parsing financial feeds. Given a high-level feed format description, FINPAGE generates an area-efficient hardware parser capable of processing feeds at line rate. © 2013 IEEE.