Fabrication of extremely thin silicon on insulator for fully-depleted CMOS applications

Abstract

A technique to produce extremely thin (<1000 Å) silicon on insulator (SOI) films for fully-depleted CMOS fabrication is described. The worst-case film thickness uniformity is ±200 Å across a 125 mm wafer for a given area factor. This technique utilizes a low temperature plasma enhanced chemical vapor deposition of Si3N4 acting as a chemical-mechanical polish-stop layer. The nitride film thickness is translated into the SOI by chemical-mechanical polishing. © 1993.