VLSI Technology 2021
Short course

Extension of Cu Interconnects and Considerations for Post-Cu Alternative Metals in Advanced Nodes

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Due to continued scaling of BEOL Cu interconnect dimensions, achieving void-free Cu fill has proven to be very challenging. To improve Cu fill performance, several novel methods such as Cu reflow fill have been developed and incorporated. However, even with decent Cu fill capability, line resistance increase and EM performance degradation remain as two major issues for Cu interconnects at small dimensions that need to be addressed to extend Cu interconnects towards future nodes. In parallel with the intensive effort to extend Cu as an interconnect metal, post-Cu alternative metals such as platinum group metals are being considered with keen interest because of their favorable electron scattering behavior (which should alleviate the line R increase caused by size effects) and higher melting point (which should lead to better EM performance). In this presentation, several key approaches to overcome these two major challenges of line R increase and EM degradation for extending Cu interconnects are shared. Furthermore, various aspects of post-Cu alternative metal interconnects are discussed.


13 Jun 2021


VLSI Technology 2021