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JES
Paper

Elimination of End-of-Range Shallow Junction Implantation Damage during CMOS Titanium Silicidation

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Abstract

Interstitial dislocation loops present in shallow junctions formed following Ge preamorphization (85 keV, 1Χ1015 cm-2) and rapid thermal annealing have been eliminated using titanium silicide. The dissolution of these end-of-range defects is attributed to the injection of vacancies during silicidation. The size and number of the residual extended defects were reduced in both p+ and n+ junctions after the formation of TiSi2. The silicide sheet resistance is a measure of the amount of silicide reaction and concomitant vacancy injection. The total elimination of these defects was observed in shallow p+junctions for sheet resistance of TiSi2 below 3Ω/▭. Leakage current reduction in silicided p+/n junctions, was correlated with the defect reduction. © 1989, The Electrochemical Society, Inc. All rights reserved.

Date

07 Dec 2019

Publication

JES

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